There are many commercially available text books that explain the general operation of displays for personal computers. Two such books are "Inside the IBM PC" by Peter Norton, published by Prentice Hall Press, 1986, and a book entitled "Programmer's guide to PC and PS/2 Video Systems" by Richard Wilton, Microsoft Press, 1988. The background information in these books is hereby incorporated by reference and no explanation of the general operation of video displays will be given herein.
As explained in the above cited references, computers generally store video data in multibit bytes. For example, many computers use eight bit bytes. Each bit in a byte can represent the "on" or "off" status of one pixel on the display. Thus an eight bit byte can represent the "on" or "off" status of eight pixels on the display.
One way to display alpha-numeric characters in such systems is to mandate that each character will not cross a byte boundary. Thus each character or letter fits within a block which is for example, eight bits wide and several lines high. In such a system wide characters and narrow characters must fit within the same size box.
More sophisticated systems require that characters cross byte boundaries. In these more sophisticated systems a character can be positioned starting at any bit position across the screen. Circuitry generally known in the art as "Bit Blitter" circuitry is provided to move characters or other images across byte boundaries.
Existing bit blitters generally utilize a shift register which is twice as wide as the main data path. For example if the system includes eight bit data words, a 16 bit shift register is used. FIG. 1A shows an example of a prior art bit bitter circuit. In the circuit shown in FIG. 1A an image is shown as going from a location in memory bank M1-1 to a shifted position in a memory bank M2-1. In many practical systems memory bank M1-1 and memory bank M2-1 would in fact be the same memory; however, they are shown separate in FIG. 1A for ease Of explanation.
In the circuit shown in FIG. 1A data from the image in memory bank M1-1 goes through the memory register MR1-1 into two registers R1-1 and R2-1. Adjacent bytes from memory bank M1-1 are placed in registers R1-1 and R2-1 and then both bytes from registers R1-1 and R2-1 are transferred to shift register S1-1. The data is shifted the desired number of positions and then gated out of the eight high order positions of the shift register to memory register MR2-1. As shown in FIG. 1A the positions of the characters "L" and "T" are shifted by four bit positions as they move from memory bank M1-1 to memory bank M2-1. It is noted that in memory bank M2-1 each of the characters "L" and "T" crosses a byte boundary.
Circuitry which is not shown herein is usually provided to transfer data between registers R1-1 and R2-1 so that a particular byte of data only need be read out of memory M1-1 once.
The operations which occur as byte 2, byte 3, and byte 4 are shifted as shown in FIG. 1B. The special initialization operations that occur with byte 1 are not shown since they are not relevant to the present invention. During the steps designated Step One, Step Two and Step Three, the contents of each of the Registers R1-1, R2-1, and MR2-1 is shown. Furthermore the contents of shift register S1-1 is shown in each step both before and after the shift operation. The data in registers R1-1 and R2-1 coincides with the data in memory bank M1-1, the data in register MR2-1 coincides with the data in memory M2-1. FIG. 1B also shows the data in the shift register S1 before and after the shift operation.
An example of a commercially available Bit Blitter is a circuit marketed by National Semiconductor Corporation and designated the "DP8511 BITBLT Processing Unit". As shown in the specification sheet published by National Semiconductor Corporation for the DP8511 circuit is designed to handle 8 bit bytes and it includes a sixteen bit shift register.
Other prior art bit blitters implemented entirely in software. Bit blitters implemented in software are inherently slower than are bit blitters implemented in hardware.